This invention is in the field of digital audio systems, and is more specifically directed to digital audio systems utilizing class D output amplification.
In recent years, digital signal processing techniques have become prevalent in many electronic systems. Tremendous increases in the switching speed of digital circuits have enabled digital signal processing to replace, in large part, analog circuits in many applications. For example, the sampling rates of modern digital signal processing are sufficiently fast that digital techniques have become widely implemented in audio electronic applications.
Digital techniques for audio signal processing now extend to the driving of the audio output amplifiers. A new class of amplifier circuits has now become popular in many audio applications, namely “class D” amplifiers. Class D amplifiers drive a complementary output signal that is digital in nature, with the output voltage swinging fully from “rail-to-rail” at a duty cycle that varies with the audio information. Complementary metal-oxide-semiconductor (CMOS) output drive transistors are thus suitable for class D amplifiers, as such devices are capable of high, full-rail, switching rates such as desired for digital applications. As known in the art, CMOS drivers conduct extremely low DC current, and their resulting efficiency is especially beneficial in portable and automotive audio applications, as well as in small form factor systems such as flat-panel LCD and plasma televisions, and DVD receivers. The ability to realize the audio output amplifier in CMOS has also enabled integration of an audio output amplifier with other circuitry in the audio system, further improving efficiency and also reducing manufacturing cost of the system. This integration also provides performance benefits resulting from close device matching between the output devices and the upstream circuits, and from reduced signal attenuation.
As is fundamental in the art, several types of audio signals are amplitude-modulated signals, in which a sinusoidal signal (the “carrier”) at a relatively high frequency is amplitude-modulated with the audio information. Conventional tuners include an analog demodulator that mixes the input signal with an unmodulated sinusoid at the carrier frequency in one or more stages, to resolve a difference signal corresponding to the modulated audio information, but at baseband (i.e., audio) frequencies. These conventional tuners then convert the baseband modulation signal to a digital data stream by way of conventional analog-to-digital conversion, at a fixed sample frequency (e.g., 44.1 kHz, or 48 kHz) that is above the Nyquist criterion for the desired audio frequencies. In conventional class D audio systems, the sampled baseband modulation signal is then pulse-width-modulated to produce drive signals for the system speakers.
It has been observed, in connection with this invention, that the clock rates involved in the generation of pulse-width-modulated control signals for class D output amplifiers also produce significant electromagnetic interference (EMI). This EMI can be of sufficient magnitude to cause interference with the incoming AM signal, and also with the incoming signal after it has been partially demodulated to an intermediate frequency (IF) when conventional two-step demodulation is used. Specifically, it has been observed, in conventional digital audio systems, that lower harmonics of typical PWM frame rates are within the AM radio frequency band, and that the fundamental PWM frame rate frequency and its lower harmonics can interfere with the tuned AM carrier frequency, the IF, and other frequencies in the demodulation of the incoming AM signal. This interference can significantly degrade the signal-to-noise ratio, and reduce the sensitivity of the.
It has been previously recognized that it would be useful to select a PWM frame rate frequency, for switching amplifiers such as class D output amplifiers, that avoids certain frequencies. Conventional techniques for selecting the pulse frame rate of switching amplifiers are described in U.S. Pat. No. 6,456,127 B1, and in U.S. Patent Application Publications US 2002/0057115 A1 and US 2003/0058973 A1, all of which are commonly assigned herewith and incorporated hereinto by this reference.
These and other conventional approaches to adjusting the PWM frame rate and other high-speed clock rates to avoid AM interference are typically quite complicated. According to one type of such adjustment, the audio sample rate is adjusted according to the tuned AM frequency, with the downstream clock rates (including the PWM frame rate) being adjusted according to the adjusted sample rate. Conventional systems following this approach require significant digital filtering to eliminate artifacts caused by the sample rate adjustment, however. In addition, it has been observed that conventional techniques for selecting the appropriate adjusted sample rate or other clock rate adjustment are quite complicated, involving substantial investment in logic circuitry or computational complexity.